data sheet mpc100es6535 revision 4 june 9, 2009 1 ?2009 integrated device technology, inc. 3.3v lvcmos-to-lvpecl 1:4 fanout buffer mc100es6535 the mc100es6535 is a low ske w, high performance 3.3 v 1-to-4 lvcmos to lvpecl fanout buffer. the es6535 has two selectable inpu ts that allow lvcmos or lvttl input levels which translate to lvpecl outputs. the clock enable is internally synchronized to eliminate runt pulses on the outputs during asynchronous assertion/deassertion of the clock enable pin. the es6535 is ideal for high performance clock distribution applications. features ? 4 differential lvpecl outputs ? 2 selectable lvcmos/lvttl inputs ? 1 ghz maximum output frequency ? translates lvcmos/lvttl levels to lvpecl levels ? 30 ps maximum output skew ? 190 ps part-to-part skew ? 3.3 v operating range ? 20-lead tssop package ? ambient temperature range ?40 c to +85 c ? 20-lead pb-free package available ordering information device package mc100es6535dt tssop-20 MC100ES6535DTR2 tssop-20 mc100es6535ej tssop-20 (pb-free) mc100es6535ejr2 tssop-20 (pb-free) dt suffix 20-lead tssop package case 948e-02 ej suffix 20-lead tssop package pb-free package case 948e-02
mpc100es6535 data sheet 3.3v lvcmos-to-lvpecl 1:4 fanout buffer mpc100es6535 revision 4 june 9, 2009 2 ?2009 integrated device technology, inc. table 1. pin description number name type description 1v ee power negative supply pin 2 clk_en input pullup (1) 1. pullup and pulldown refer to internal input resistors. synchronizing clock enable. when high, cloc k outputs follow clock input. when low, q outputs are forced low, q outputs are forced high. lvcmos/lvttl interface levels 3 clk_sel input pulldown (1) clock select input. when high, selects clk1 input.. when low, selects clk0 input. lvcmos/lvttl interface levels 4 clk0 input pulldown (1) lvcmos/lvttl clock input 6 clk1 input pulldown (1) lvcmos/lvttl clock input 5, 7, 8, 9 nc unused no connect 10, 13, 18 v cc power positive supply pin 11, 12 q3, q3 output lvpecl differential output pair 14, 15 q2, q2 output lvpecl differential output pair 16, 17 q1, q1 output lvpecl differential output pair 19, 20 q0, q0 output lvpecl differential output pair table 2. control input function table (1) 1. after clk_en switches, the clock outputs are disabled or en abled following a rising and falli ng input clock edge. in the acti ve mode, the state of the outputs are a function of the clk0 and clk1 inputs as described in . inputs outputs clk_en clk_sel selected source q0:q3 q0 :q3 0 0 clk0 disabled; low disabled; high 0 1 clk1 disabled; low disabled; high 1 0 clk0 enabled enabled 1 1 clk1 enabled enabled d le q clk_en clk_sel clk1 clk0 q0 q0 q1 q1 q2 q2 q3 q3 1 0 1 2 3 4 5 6 7 8 19 18 17 16 15 14 13 20 mc100es6535 9 10 12 11 v ee clk_en clk_sel clk0 nc clk1 nc v cc nc nc q0 q0 v cc q1 q1 q2 q2 q3 v cc q3 figure 1. logic diagram figure 2. 20-lead pinout (top view)
mpc100es6535 data sheet 3.3v lvcmos-to-lvpecl 1:4 fanout buffer mpc100es6535 revision 4 june 9, 2009 3 ?2009 integrated device technology, inc. . clock input function table inputs outputs clk0 or clk1 q0:q3 q0 :q3 0lowhigh 1highlow table 3. general specifications characteristics value internal input pulldown resistor 75 k ? internal input pullup resistor 75 k ? esd protection human body model machine model 4000 v 200 v ja thermal resistance (junction-to-ambient) 0 lfpm, 20 tssop 500 lfpm, 20 tssop 140c/w 100c/w meets or exceeds jedec spec eia/jesd78 ic latchup test table 4. absolute maximum ratings (1) 1. absolute maximum continuous ratings are those maximum values beyond which damage to the device may occur. exposure to these c onditions or conditions beyond those indicated may adverse ly affect device reliability. functional operation at absolute-maximum-rated condi tions is not implied. symbol rating conditions rating units v supply power supply voltage difference between v cc & v ee 3.9 v v in input voltage v cc ? v ee 3.6 v v cc +0.3 v ee ?0.3 v v i out output current continuous surge 50 100 ma ma t a operating temperature range ?40 to +85 c t store storage temperature range ?65 to +150 c table 5. dc characteristics (v cc = 3.135 v to 3.8 v; v ee = 0 v) symbol characteristic ?40 c0 c to 85 c unit min typ max min typ max i ee power supply current 35 45 ma v oh (1) 1. outputs are terminated through a 50 ? resistor to v cc ? 2 volts. output high voltage v cc ?1150 v cc ?1020 v cc ?800 v cc ?1200 v cc ?970 v cc ?750 mv v ol output low voltage v cc ?1950 v cc ?1620 v cc ?1250 v cc ?2000 v cc ?1680 v cc ?1300 mv table 6. lvttl / lvcmos input dc characteristics (v cc = 3.135 v to 3.8 v) symbol characteristic condition -40 c0 c to 85 c unit min typ max min typ max i in input current v in = v cc 150 150 a v ik input clamp voltage i in = ?18 ma ?1.2 ?1.2 v v ih input high voltage 2.0 v cc +0.3 2.0 v cc +0.3 v v il input low voltage 0.8 0.8 v
mpc100es6535 data sheet 3.3v lvcmos-to-lvpecl 1:4 fanout buffer mpc100es6535 revision 4 june 9, 2009 4 ?2009 integrated device technology, inc. table 7. ac characteristics (v cc = 3.135 v to 3.8 v, v ee = 0 v) symbol characteristic ? 40 c25 c85 c unit min typ max min typ max min typ max f max maximum toggle frequency 1 1 1 ghz t pd propagation delay to output differential 150 350 500 175 360 550 200 380 600 ps t skew skew output-to-output part-to-part 20 30 190 20 30 190 20 30 190 ps ps t jitter cycle-to-cycle jitter rms (1 )1 1 1ps v outpp output peak-to-peak voltage 350 750 350 750 350 750 mv t r /t f output rise/fall time (20%?80% @ 50 mhz) 50 400 50 400 50 400 ps 50 ? driver device receiver device q qb d db 50 ? v tt figure 3. typical termination for ou tput driver and device evaluation
mpc100es6535 data sheet 3.3v lvcmos-to-lvpecl 1:4 fanout buffer mpc100es6535 revision 4 june 9, 2009 5 ?2009 integrated device technology, inc. package dimensions case 948e-02 issue c 20-lead tssop package page 1 of 3
mpc100es6535 data sheet 3.3v lvcmos-to-lvpecl 1:4 fanout buffer mpc100es6535 revision 4 june 9, 2009 6 ?2009 integrated device technology, inc. package dimensions case 948e-02 issue c 20-lead tssop package page 2 of 3
mpc100es6535 data sheet 3.3v lvcmos-to-lvpecl 1:4 fanout buffer mpc100es6535 revision 4 june 9, 2009 7 ?2009 integrated device technology, inc. package dimensions case 948e-02 issue c 20-lead tssop package page 3 of 3
mpc100es6535 data sheet 3.3v lvcmos-to-lvpecl 1:4 fanout buffer disclaimer integrated device technology, inc. (idt) and its subsidiaries reserve the ri ght to modify the products and/or specif ications described herein at any time and at idt? s sole discretion. all information in this document, including descriptions of product features and performance, is s ubject to change without notice. performance specifications and the operating parameters of the described products are determined in the independent state and are not guaranteed to perform the same way when in stalled in customer products. the informa tion contained herein is provided without re presentation or warranty of any kind, whether express or implied, including, but not limited to, the suitability of idt?s products for any partic ular purpose, an implied warranty of merc hantability, or non-infringement of the in tellectual property rights of others. this document is presented only as a guide and does not convey any license under intellectual property rights of idt or any third parties. idt?s products are not intended for use in life support systems or similar devices where the failure or malfunction of an idt p roduct can be reasonably expected to significantly affect the health or safety of users. anyone using an idt product in such a manner does so at their own ri sk, absent an express, written agreement by idt. integrated device technology, idt and the idt logo are registered tr ademarks of idt. other trademarks and service marks used he rein, including protected names, logos and designs, are the property of idt or their respective third party owners. copyright 2009. all rights reserved. 6024 silver creek valley road san jose, california 95138 sales 800-345-7015 (inside usa) +408-284-8200 (outside usa) fax: 408-284-2775 www.idt.com/go/contactidt technical support netcom@idt.com +480-763-2056
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